A highly-scaleable FIR using the radix-4 Booth algorithm

A highly-scaleable FIR architecture based on the radix-4 Booth algorithm has been designed with scaleable dynamic ranges of input data and filter coefficients. The radix-4 Booth algorithm is demonstrated to have a lower hardware complexity and a fair throughput rate than the other radix approaches. In order to achieve scaleability, the configurable-connection function between latches of input data, and filter taps has been explored. The precision of filter coefficients is adjustable by using a pathcontrol function. Especially, the proposed architecture only employs data-path controls to realize the scaleable issue without changing the word lengths and components of input latches and filter taps. The pre-processing unit for manipulating input data and post-processing unit for computing accumulation results have been realized to support scaleable operations. Based on our architecture in a chip design, the cascaded configuration between chips is also easily accomplished for many industrial applications.